Microprocessor and Assembly
language
1. EOC
stands for:
a.
End of
conversion
b.
Emphasize of conversion
c.
End of controller
d.
None of these
2.
IRR stands for:
a.
Interrupt
request register
b.
Input request register
c.
Interrupt resolver register
d.
Input resolver register
3.
ISR stands for:
a.
Interrupt service register
b.
Input service register
c.
In-service
register
d.
All of these
4.
PR stands for:
a.
Priority register
b.
Priority
resolver
c.
Priority request
d.
None of these
5.
IMR stands for:
a.
Input mask register
b.
Input mask resolver
c.
Interrupt mask resolver
d.
Interrupt
mask register
6.
INT stands for:
a.
Input
b.
Interrupt
c.
Both a and b
d.
None of these
7.
INTA stands for:
a.
Interrupt
acknowledge
b.
Interrupt access
c.
Interrupt address
d.
None of these
8.
CS stands for:
a.
Command select
b.
Chip select
c.
Chip series
d.
Command series
9.
RD stands for:
a.
Read
b.
Register
c.
Request
d.
Real
10.
ICW stands for:
a.
Interrupt command words
b.
Interrupt command write
c.
Initialization
command words
d.
Initialization
command write
11.
OCW stands for:
a.
Operational
command words
b.
Operational conjunction words
c.
Operational control words
d.
Operational cost words
12.
DMA stands for:
a.
Direct memory allocation
b.
Direct
memory access
c.
Direct memory application
d.
Direct memory acknowledgment
13.
HLD stands for:
a.
High
b.
Hour
c.
Hold
d.
None of these
14.
HLDA stands for:
a.
High acknowledgment
b.
Hold
acknowledgment
c.
High access
d.
Hold access
15.
HRQ stands for:
a.
Hold request
b.
Hold read
c.
Hold register
d.
Hold resolver
16.
AEN stands for:
a.
Address
enable
b.
Address equivalent
c.
Acknowledgment enable
d.
Acknowledgment equivalent
17.
ADSTB stands for:
a.
Access strobe
b.
Access strobe
c.
Address store
d.
Address strobe
18.
MEMER and MEMW means:
a.
Memory read
b.
Memory write
c.
Both a and b
d.
None of these
19.
HRQ and HLDA means:
a.
Hold request
b.
Hold acknowledgment
c.
Both a and b
d.
None of these
20.
ADC stands for:
a.
Analogue to analogue converters
b.
Analogue to
digital converters
c.
Digital to digital converters
d.
Digital to analogue converters
21.
DAC stands for:
a.
Analogue to analogue converters
b.
Analogue to digital converters
c.
Digital to digital converters
d.
Digital to
analogue converters
22.
Which is the commonly used programmable interface and
particular used to provide handshaking:
a.
8251
b.
8254
c.
8259
d.
8255
23.
Which is a programmable communication interface:
a.
8255
b.
8254
c.
8251
d.
8259
24.
Which
programmable timer is used to generate timing signal :
a.
8255
b.
8254
c.
8251
d.
8259
25.
Which is widely used in interrupt controller with a
number of microprocessor:
a.
8251
b.
8254
c.
8255
d.
8259
26.
Which are used DMA controllers with 8085/8086
microprocessor:
a.
8237
b.
8257
c.
Both a and b
d.
None of these
27.
Which provide a
mechanism to establish a link between the microprocessor and i/o device:
a.
Input interface
b.
Output interface
c.
Both a and b
d.
None of these
28.
In which the
processor uses a protection of the memory address to represent I/O ports:
a.
Memory
mapped I/O
b.
I/O memory mapped
c.
Both a and b
d.
None of these
29.
The standard I /O is also called:
a.
I/O mapped I/O
b.
Isolated I/O
c.
Both a and b
d.
None of these
30.
The processor of knowing the status of device and
transferring the data with matching speeds is called:
a.
Handshaking
b.
Peripheral
c.
Ports
d.
None of these
31.
Which is designed to automatically manage the handshake
operation:
a.
8251
b.
8254
c.
8255
d.
8259
32.
Which mode is used for single handshake in 8255:
a.
Mode 0
b.
Mode 1
c.
Mode 2
d.
None of these
33.
Which mode is used for double handshake in 8255:
a.
Mode 0
b.
Mode 1
c.
Mode 2
d.
None of these
34.
Which mode is used for simple input or output without
handshaking:
a.
Mode 0
b.
Mode 1
c.
Mode 2
d.
None of these
35.
Which are used for port B in 8255:
a.
PC0-PC2
b.
PC3-PC7
c.
PC6-PC7
d.
PC3-PC5
36.
Which are used for port A in 8255 mode 1:
a.
PC0-PC2
b.
PC3-PC7
c.
PC6-PC7
d.
PC3-PC5
37.
Which are used for handshake lines for port A in 8255
mode 2:
a.
PC0-PC2
b.
PC3-PC7
c.
PC6-PC7
d.
PC3-PC5
38.
AL&99H which operation is performed here:
a.
Input
b.
Output
c.
Both a & b
d.
None of these
39.
34H&AX which operation is performed here:
a.
Input
b.
Output
c.
Progress
d.
None of these
40.
Which chip used for AD&DA converters in 8086
processor:
a.
8251
b.
8255
c.
8254
d.
8259
41.
The time taken by the ADC from the active edge of SOC
pulse till the active edge of EOC signal is called:
a.
Conversion over
b.
Conversion
delay
c.
Conversion signal
d.
None of these
42.
Arrange the flowing step of the general algorithm for
ADC interfacing:
i.
Issuing start of conversion pulse to ADC.
ii.
Marking the end of the conversion processes by the.
iii.
Read digital data output of the ADC as equivalent
digital output.
iv.
Ensuring the stability of analogue input applied to the
ADC.
a.
2,1,3,4
b.
4,1,2,3
c.
1,2,3,4
d.
4,3,2,1
43.
Which chip is used for analogue to digital converter:
a.
0809
b.
0808
c.
Both a &
b
d.
None of these
44.
Which multiplexer by ADC 0808/0809:
a.
2:4
b.
3:8
c.
4:16
d.
None of these
45.
Which chip is used for DAC:
a.
AD7521
b.
AD7522
c.
AD7523
d.
AD7524
46.
Which converters convert binary number into their
equivalent voltages:
a.
Analogue to analogue
b.
Analogue to digital
c.
Digital to digital
d.
Digital to
analogue
47.
An external feedback resistor acts to control the:
a.
Gain
b.
Gate
c.
Loss
d.
Profit
48.
Which used to generate accurate time delays and can be
used for other timing application such as a real time clock an event counter a
digital one shot a square wave generator and a complex wave form generator:
a.
8251 programmable timer
b.
8255 programmable timer
c.
8254
programmable timer
d.
8259 programmable timer
49.
8254 programmable timer counter has two inputs signals:
a.
CLK
b.
Gate
c.
Both a &
b
d.
None of these
50.
8254 programmable timer counter has:
a.
1output
signal
b.
2output signal
c.
3output signal
d.
4output signal
51.
8254 can operate how many operating modes:
a.
2
b.
4
c.
6
d.
8
52.
8254 gate of a counter is to either:
a.
Enable counting
b.
Disable counting
c.
Both
d.
None of these
53.
8254 counters can
count in the:
a.
Binary
b.
Decimal
c.
Hexadecimal
d.
A & B
54.
How many modes in 8254:
a.
2
b.
4
c.
6
d.
8
55.
Which is the state of gate signal for normal contains:
a.
Low
b.
High
c.
Undefined
d.
None of these
56.
Which generate
an interrupt to the microprocessor after a certain interval of time:
a.
8251
b.
8254
c.
8255
d. 8259
d. 8259
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